UofA Audio System
This is a four part project to develop a practical (though not particularly hi-fi) audio system consisting of the modules:
  1. Power Supply
  2. Preamplifier
  3. Tone Control
  4. Power Amplifier
The project provides the opportunity to put a design into practice, and to deal with the practical problems of a real circuit. It also provides practice in troubleshooting.

Some key strategies to be considered are:
  • Avoid problems with "earthing", that is, the unintentional coupling of circuits through the common return path. Some principles are given here.
  • Design for robustness. As real components vary considerably in their properties, attempt to design using worst case properties so that almost any component can be used. Otherwise extra effort will be needed to sort out components. An example is the BJT beta which varies widely between devices, even from the same production batch. In this case attempt to design using the datasheet specified minimum beta (if given) to avoid the need to measure beta on individual devices.
  • Simplify troubleshooting of complex circuits by devising a strategy for developement. Build the circuits in small sections and test each one fully before adding the next part.

Power Supply

The specification for this module is
  • Linear power supply consisting of a transformer, rectifier filter capacitors and linear voltage regulators.
  • Mains input, positive and negative 12V 1A DC output. A dual 15V 1A RMS AC mains transformer is used.
  • Output ripple must be better than 1mV.
The difficulty with this module is that the voltage drops in the circuit from the 15V transformer output can result in the regulators being unable to work effectively. The voltage drops occur mainly in four places:
  • The internal resistance of the transformer. This is not a particular difficulty as the transformer is rated as 1A, which means that it provides 15V RMS AC output when the current drain is 1A RMS. It is not required to provide more than 1A output from the module, so the AC voltage should not drop below 15V.
  • The voltage drops across the pn junctions of the rectifier diodes.
  • The voltage droop at the filter capacitors. This can be controlled by selection of suitably large filter capacitors, but may need to be as large as one to two volts if unreasonably large capacitor values are to be avoided.
  • The required voltage difference between the regulator input and output (check the datasheets).
Voltage drop across the rectifier diode junctions will nominally be around 0.6-0.7V. Full-wave rectifier configurations, which have significant advantages over the half-wave rectifier, actually drop twice this value, so we need to be a bit canny about using this. If one full-wave rectifier is used to handle the two voltage outputs we can split this double voltage drop between the two outputs. The circuit below shows this configuration.

A voltage regulator will require an input voltage that has a minimum level over the 12V output. If this is not respected, then the output will show a large component of the input ripple. For a common regulator (eg 7812 or 7912) this margin is about 1.5V.

The capacitors C1 and C2 are large value electrolytics. You need to determine a suitable value for these to ensure that the voltage droop between the peak voltage at the rectifier output and the following peak due to the current drain from the load, does not result in the regulators failing to work effectively. If you select values that are too big (over-engineered), then your product will be more expensive and your reputation as a good engineer may be compromised. Some additional useful information may be found here.

The capacitors C3 and C4 are needed to prevent oscillation if the load is some distance from the regulator outputs. This is particularly important for the negative regulator. The datasheets provide recommendations, but some experimenting may be needed.

You may have excessive ripple if you haven't dealt with the earthing problem adequately.

Preamplifier

The preamplifier is required to amplify a signal from 10mV RMS to 0.5V RMS with a flat frequency response from 20Hz to 20kHz (that is, the corner frequencies of the frequency response rolloff should be outside that frequency range). The input impedance must be greater than 10K and the output impedance less than 1K. It is also required to have an overall Total Harmonic Distortion (THD) less than 1%. The two requirements of gain and THD are complementary, that is, high gain tends to have high THD and vice versa. The impedance requirements are also a complicating factor. The amplifier is required to be built using the common emitter amplifier with emitter degeneration:

This circuit is shown with two similar stages. The emitter degeneration resistors (R2 and R6) provide some feedback to reduce gain and THD. The two stages are needed to enable the high gain to be obtained while keeping THD low. Gain is the product of the gain of the two stages, while THD is the sum of the THDs of the two stages. A single stage will not satisfy the requirements.

A second order small signal analysis can provide a measure of the THD in terms of gain. This sort of analysis is very useful in providing an overall understanding of the behaviour of these two performance measures. You can then decide how best to optimize the circuit. A PSpice analysis will provide slightly more accurate measures, but only for fixed circuit values.

Design

The design of this circuit is not as difficult as it looks. Consider the second stage. The output impedance is effectively given by R9, so that is fixed (choose the specified value of 1K). The biasing scheme chosen will enable you to start by choosing the voltage across R9. This gives the collector current. A common biasing scheme splits the supply voltage equally across the collector resistor, base-collector junction and base to common. This scheme is designed to maximize the output signal swing, and so this choice of voltage bias split may not be important if the output voltage swing is not large (eg in the first stage). Try to keep the collector current small as this will increase the input impedance. By assuming a 0.7V drop across the base-emitter junction, you can determine the value for R6+R7 which have the collector current (approximately) passing through them. Use the rule that the current in the bias chain resistors be 10 times greater than the base current. The datasheets should give the minimum hfe (current gain) for the transistor so that the largest base bias current can be determined. There is now enough information to determine R8 and R10.

There is now a need to make some higher level decisions. You would obtain best results, and satisfy your laziness instinct, if you chose the two stages to be identical. Thus if both have equal gain, they will have equal THD. Given the strong dependence of THD on gain as found in the analysis, you can't afford to have gain of one stage much greater than that of the other. Also the input impedance of the second stage should be high and the output impedance of the first stage should be low to avoid voltage drop between the two stages. If you start off with fully identical stages you could make some adjustments to the design later if needed.

With identical stages, the attenuation between stages is about 0.9. Thus we need an overall gain of 50/0.9=55.5, giving a gain per stage of 7.5. The gain of the common emitter amplifier with emitter degeneration is approximately given by the ratio of the collector to the emitter degeneration resistor (R9/R6 for the second stage). Thus if R9 was chosen to be 1K, then R6=133 ohms. We need to select preferred resistor values, so this would be chosen as 120 ohms for 5% resistors, or 130 ohms for 1% resistors.

Thus we have the first cut design of one of our stages, and we can now determine the input impedance. This depends mainly on the emitter degeneration resistor. If the input impedance is less than 10K, some adjustments to the design will need to be made. For example a better transistor can be selected. Check the datasheets for minimum hfe. You will note that it can be quite small and may vary with collector current. Also the collector current can be reduced. This will change the bias conditions, so check that changes in the bias voltages do not cause the output signal to clip. For the first stage you can select a bias voltage across R1 to be reasonably small as the output voltage at this stage is less than 100mV RMS. This will give lower collector current and hence higher input impedance. THD may be higher however.

Once you are satisfied with the design for one stage, check that the overall requirements for both stages are satisfied, and simulate it over the required frequency range. You need to choose the coupling and bypass capacitors to satisfy the frequency response requirements. You should be able to obtain a good design, although there will not be much room for variation.

Testing

If the signal generator that you are using cannot provide you with a 10mV RMS signal, build a voltage divider to reduce its level. This may be a good idea anyway to ensure that you get a measurable input signal. Set the signal generator to provide you with a 1V RMS signal, and divide by 100. You can use a trimpot to ensure that you have an accurate divider.

If you try to use a signal that is greater than 10mV you may get clipping and other forms of distortion in later stages.

Power Amplifier

A suitable circuit for a power amplifier is given below. The specifications are to amplify a 0.5V RMS signal to drive a 4 ohm 4W speaker. This requires both voltage and current gain. The input impedance must be greater than 10K.
Circuit 1
This circuit has the following features:
  • The most efficient arrangement for a power amplifier is a push-pull arrangement. This does not draw a large bias current in addition to the signal as would be the case with other circuit arrangements. Such heavy bias currents not only waste power, but require expensive heavy duty components and can cause problems with overheating.
  • The push-pull arrangement of the power transistors introduces significant nonlinearity, particularly near the zero voltage (crossover) point.vbemult This is because the transistors do not start to conduct significantly until the base-emitter voltage is greater than about 0.6-0.7V (when the transistor is working in the active mode as we would require). Feedback through an operational amplifier reduces this nonlinearity.
  • A circuit can be added to the power transistors to offset their bias and so avoid the strong nonlinearity at the crossover point. This can be done with diodes as shown. These will offset the bias point with a fixed voltage somewhat independently of the current through them. A circuit called a Vbe multiplier (see right) will do the same thing and has the advantage that the offset voltage can be varied with a trimpot. As you are using a high gain operational amplifier to reduce nonlinearity, then you may get reasonable results even without any offset circuit. Try it!
  • The bias offset may cause the transistors to draw heavy bias current if it is too high. It must be carefully chosen to balance its effectiveness in reducing nonlinearity, against the bias current that it causes to flow. Using four diodes as shown in the circuit above may give too much bias voltage offset. Pay careful attention to this aspect of the design.
  • It is best to perform voltage amplification in a separate stage prior to the current amplification. This will give best linearity and separates out the input section from the power amplifier section, simplifying the design problem.
You may need to deal with oscillation problems if you haven't dealt with the earthing problem adequately.

Design

The circuit needs an input stage to provide the voltage amplification. A non-inverting operational amplifier configuration has quite high input impedance. The second stage as shown in the circuit above uses an operational amplifier with a unity voltage gain feedback, with the output part being the power transistor circuit. A chain of diodes, each of which will give about 0.6-0.7V, or a Vbe multiplier can be used for bias voltage offset. As the current gain of a power transistor can be quite low, a second transistor should be used to boost the overall current gain (the product of the current gains of each transistor in the pair), at the expense of a higher overall base to emitter voltage. This is the Darlington pair configuration.

Four diodes are shown in the circuit to offset the four base-emitter junctions in the power circuit. However the voltage drop across the four diodes is probably too much and it can safely be reduced to 3 diodes.

The resistors provide a current through the bias chain and must handle the base current to the power transistors. The usual rules of biasing are applicable here. Ensure that the worst case base current is about ten times less than the current in the bias circuit to reduce the dependence of bias voltages on the base current and temperature.

Example

Suppose that we have chosen complementary power transistors MJE3055 (NPN) and MJE2955 (PNP). These have matched characteristics. The datasheets show that they have a minimum current gain hfe of 20 at 4A collector current. As we are drawing about 1A RMS, we can use this value for design. The base current will then be less than 50mA RMS maximum. Suitable transistors for the Darlington pair could then be quite inexpensive, such as the BC327 and BC337 complementary pair. These can source as much as 500mA collector current. The minimum current gain for these is given as 100, so we only need to provide 0.5mA RMS from the operational amplifier into the base of the Darlington pair power transistors. The bias chain would then be designed to carry 5mA bias current.

Performance Measurement

To measure the THD (Total Harmonic Distortion) you may be able to use a Spectrum Analyser or a CRO with an FFT facility. Feed in to the amplifier a high quality sine wave at the frequency of interest and look at the amplifier output spectrum. Measure the amplitudes of the fundamental and second harmonic. The ratio of the powers of these two will give a reasonably good measure of THD (assuming that higher order harmonics are negligible - you should check this). Check also the input signal to ensure that it has a negligible second harmonic.

Oscillation

This is very difficult to control. Inadequate decoupling of power supplies can even make matters worse. Probably the best approach, if it is a problem, is to build the feedback to the operational amplifier in the power stage as an inverting configuration so that a resistor is required in the feedback loop. Then a capacitor placed across this feedback resistor can provide low pass filtering with a cutoff at the highest audio frequencies (say 20kHz). This may be sufficient to stop the oscillation. Also consider using separate power supply feeds to the power transistors and to the operational amplifier.

Integration

If your power amplifier did not oscillate when tested alone, it probably will when the modules are connected together. Keep the power and common feeds to the power amplifier strictly separated from those to the remainder of the circuit, and provide good decoupling on the power supplies to the more sensitive circuits. It may even be a good idea, for the sake of having a robust and well performing amplifier, to add a second set of regulators to the power supply just for the power amplifier part, to ensure a good separation of the power feeds. An illustration of these concepts is shown below:


P1 is the power feed to the low power sensitive amplifiers, and P2 is the power feed to the last power stage only. All common return connections are taken back to one point at the power supply.

Created 22 October 2004